Software pipelining: an effective scheduling technique for VLIW machines
PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
Loop optimization in register-transfer scheduling for DSP-systems
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Incremental tree height reduction for high level synthesis
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
VLSI and Modern Signal Processing
VLSI and Modern Signal Processing
Loop pipelining for scheduling multi-dimensional systems via rotation
DAC '94 Proceedings of the 31st annual Design Automation Conference
IEEE Transactions on Parallel and Distributed Systems
A register file and scheduling model for application specific processor synthesis
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Achieving Full Parallelism Using Multidimensional Retiming
IEEE Transactions on Parallel and Distributed Systems
Global node reduction of linear systems using ratio analysis
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
Reducing Data Hazards on Multi-pipelined DSP Architecture with Loop Scheduling
Journal of VLSI Signal Processing Systems - Special issue on future directions in the design and implementations of DSP systems
Heuristic Loop-Based Scheduling and Allocation for DSP Synthesis with Heterogeneous Functional Units
Journal of VLSI Signal Processing Systems
Probabilistic Loop Scheduling for Applications with Uncertain Execution Time
IEEE Transactions on Computers
Properties and Algorithms for Unfolding of Probabilistic Data-Flow Graphs
Journal of VLSI Signal Processing Systems
Loop Shifting for Loop Compaction
International Journal of Parallel Programming - Special issue on instruction-level parallelism and parallelizing compilation, part 2
Scheduling Data-Flow Graphs via Retiming and Unfolding
IEEE Transactions on Parallel and Distributed Systems
Probabilistic Rotation: Scheduling Graphs with Uncertain Execution Time
ICPP '97 Proceedings of the international Conference on Parallel Processing
Loop Shifting for Loop Compaction
LCPC '99 Proceedings of the 12th International Workshop on Languages and Compilers for Parallel Computing
Fully Parallel Hardware/Software Codesign for Multi-Dimensional DSP Applications
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Loop Shifting and Compaction for the High-Level Synthesis of Designs with Complex Control Flow
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Journal of VLSI Signal Processing Systems
Time-constrained scheduling of large pipelined datapaths
Journal of Systems Architecture: the EUROMICRO Journal
Computation and data transfer co-scheduling for interconnection bus minimization
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Energy efficient joint scheduling and multi-core interconnect design
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Pipelining with common operands for power-efficient linear systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Just-In-Time Software Pipelining
Proceedings of Annual IEEE/ACM International Symposium on Code Generation and Optimization
SDC-based modulo scheduling for pipeline synthesis
Proceedings of the International Conference on Computer-Aided Design
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