Partitioning Processor Arrays under Resource Constraints

Authors:
Jürgen Teich;Lothar Thiele;Lee Z. Zhang
Affiliations:
Computer Engineering and Networks Laboratory (TIK), Swiss Federal Institute of Technology (ETH), CH-8092 Zurich, Switzerland;Computer Engineering and Networks Laboratory (TIK), Swiss Federal Institute of Technology (ETH), CH-8092 Zurich, Switzerland;Institute on Microelectronics, University of Saarland, D-66041 Saarbrücken, Germany
Venue:
Journal of VLSI Signal Processing Systems
Year:
1997

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Abstract

A single integer linear programming model foroptimally scheduling partitioned regular algorithms is presented. Theherein presented methodology differs from existing methods in thefollowing capabilities: 1) Not only constraints on the number ofavailable processors and communication capabilities are taken intoaccount, but also local memories and constraintson the size of available memories. 2) Differenttypes of processors can be handled. 3) The size of the optimizationmodel (number of integer variables) is independent of the size of thetiles to be executed. Hence, 4) the number of integer variables inthe optimization model is greatly reduced such that problems ofrelevant size can be solved in practical execution time.