Built-in test for VLSI: pseudorandom techniques
Built-in test for VLSI: pseudorandom techniques
Multiple error detection and identification via signature analysis
Journal of Electronic Testing: Theory and Applications
Production Experience with Built-In Self-Test in the IBM ES/9000 System
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Salvaging test windows in BIST diagnostics
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Improving the efficiency of error identification via signature analysis
VTS '95 Proceedings of the 13th IEEE VLSI Test Symposium
Journal of Electronic Testing: Theory and Applications
Combinatorial group testing methods for the BIST diagnosis problem
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Diagnosis of logic circuits using compressed deterministic data and on-chip response comparison
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This paper uses the STUMPS architecture to study the properties of a new diagnostic procedure. According to the old procedure, the process stops at the end of each test window to compare the measured signature against its precomputed value. The old procedure also calls for the abandonment of all future test windows after the first failing one is encountered. This is due to the unavailability of expected future test window signatures in the presence of a previously captured error. This paper shows a simple method of salvaging future test windows by adjusting their expected signatures to fit past observed errors. Experiments conducted using this new procedure reveal an improvement of at least one order of magnitude in diagnostic resolution over what has been previously experienced.