Built-in test for VLSI: pseudorandom techniques
Built-in test for VLSI: pseudorandom techniques
A method for generating weighted random test pattern
IBM Journal of Research and Development
Two-Pattern Test Capabilities of Autonomous TPG Circuits
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Testing the Enterprise IBM System/390TM Multi Processor
Proceedings of the IEEE International Test Conference
Designing Self-Testable Multi-Chip Modules
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Design of efficient BIST test pattern generators for delay testing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A distributed BIST technique for diagnosis of MCM interconnections
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Distributed Diagnosis of Interconnections in SoC and MCM Designs
Journal of Electronic Testing: Theory and Applications
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