Synthesis of BIST hardware for performance testing of MCM interconnections
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
2-by-n$n$ Hybrid Cellular Automata with Regular Configuration: Theory and Application
IEEE Transactions on Computers
LFSR-Based Deterministic TPG for Two-Pattern Testing
Journal of Electronic Testing: Theory and Applications - Special Issue on the 7th ASIAN TEST SYMPOSIUM, ATS-98
BIST Test Pattern Generators for Two-Pattern Testing-Theory and Design Algorithms
IEEE Transactions on Computers
Theory of Extended Linear Machines
IEEE Transactions on Computers
Detection of CMOS address decoder open faults with March and pseudo random memory tests
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A BIST scheme for the detection of path-delay faults
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A programmable multiple-sequence generator for BIST applications
ATS '95 Proceedings of the 4th Asian Test Symposium
Accumulator-based BIST approach for stuck-open and delay fault testing
EDTC '95 Proceedings of the 1995 European conference on Design and Test
A BIST approach to delay fault testing with reduced test length
EDTC '95 Proceedings of the 1995 European conference on Design and Test
On the Generation of Pseudo-Deterministic Two-Patterns Test Sequence with LFSRs
EDTC '97 Proceedings of the 1997 European conference on Design and Test
New BIST Techniques for Universal and Robust Testing of CMOS Stuck-Open Faults
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
An optimized BIST test pattern generator for delay testing
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
TREE-STRUCTURED LINEAR CELLULAR AUTOMATA AND THEIR APPLICATIONS AS PRPGS
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Scalable Delay Fault BIST for Use with Low-Cost ATE
Journal of Electronic Testing: Theory and Applications
Distributed Diagnosis of Interconnections in SoC and MCM Designs
Journal of Electronic Testing: Theory and Applications
Cellular automata-based parallel random number generators using FPGAs
International Journal of Reconfigurable Computing
Energy-efficient low-latency 600 MHz FIR with high-overdrive charge-recovery logic
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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