Layout driven technology mapping
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Efficient implementation of retiming
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Retiming of Circuits with Single Phase Transparent Latches
ICCD '91 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Incremental layout placement modification algorithms
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Incorporating interconnect, register, and clock distribution delays into the retiming process
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Behavior and testability preservation under the retiming transformation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Retiming edge-triggered circuits under general delay models
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
Placement driven retiming with a coupled edge timing model
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Multilevel global placement with retiming
Proceedings of the 40th annual Design Automation Conference
Performance-driven register insertion in placement
Proceedings of the 2004 international symposium on Physical design
Retiming with Interconnect and Gate Delay
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Performance-driven global placement via adaptive network characterization
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Physical synthesis for FPGA interconnect power reduction by dual-Vdd budgeting and retiming
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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