Optimal allocation and binding in high-level synthesis
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Data path allocation based on bipartite weighted matching
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
Statistical delay modeling in logic design and synthesis
DAC '94 Proceedings of the 31st annual Design Automation Conference
OSCAR: optimum simultaneous scheduling, allocation and resource binding based on integer programming
EURO-DAC '94 Proceedings of the conference on European design automation
Layout-driven RTL binding techniques for high-level synthesis using accurate estimators
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Probabilistic Rotation: Scheduling Graphs with Uncertain Execution Time
ICPP '97 Proceedings of the international Conference on Parallel Processing
Voltage scheduling under unpredictabilities: a risk management paradigm
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Hi-index | 0.00 |