Fault-Tolerant Routing in DeBruijn Comrnunication Networks
IEEE Transactions on Computers
A reconfigurable and fault-tolerant VLSI multiprocessor array
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
Distributed fault-tolerance for large multiprocessor systems
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
De bruijn communications networks.
De bruijn communications networks.
A complexity theory for VLSI
Fault-Tolerant Multiprocessor Link and Bus Network Architectures
IEEE Transactions on Computers
Parallel Processing with the Perfect Shuffle
IEEE Transactions on Computers
Connectivity of Regular Directed Graphs with Small Diameters
IEEE Transactions on Computers
Correction to "Fault-Tolerant Multiprocessor Link and Bus Architectures"
IEEE Transactions on Computers
The Binary Tree as an Interconnection Network: Applications to Multiprocessor Systems and VLSI
IEEE Transactions on Computers
Generalized Hypercube and Hyperbus Structures for a Computer Network
IEEE Transactions on Computers
A Graph Model for Fault-Tolerant Computing Systems
IEEE Transactions on Computers
Fault Diagnosis in a Boolean n Cube Array of Microprocessors
IEEE Transactions on Computers
A Fault-Tolerant Communication Architecture for Distributed Systems
IEEE Transactions on Computers
A Regular Fault-Tolerant Architecture for Interconnection Networks
IEEE Transactions on Computers
The cube-connected-cycles: A versatile network for parallel computation
SFCS '79 Proceedings of the 20th Annual Symposium on Foundations of Computer Science
Flip-Trees: Fault-Tolerant Graphs with Wide Containers
IEEE Transactions on Computers - Fault-Tolerant Computing
Network Resilience: A Measure of Network Fault Tolerance
IEEE Transactions on Computers
Incremental Distance and Diameter Sequences of a Graph: New Measures of Network Performance
IEEE Transactions on Computers
A Synthesis Approach to Design Optimally Fault Tolerant Network Architecture
IEEE Transactions on Computers
Fault-Tolerant Networks Based on the de Bruijn Graph
IEEE Transactions on Computers
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This correspondence presents a class of optimally fault tolerant multiprocessor network architecture, based on the networks proposed earlier by Pradhan [71, where the networks are represented by regular digraphs. Because of optimal fault tolerapce, the number of connections per node is precisely related to the degree of fault tolerance the network is designed to provide. The routing of messgges in presence Qf faults is adaptive and unless the number of faults is equal to the degree of fault tolerance the increase in routing delay in presence of faults is minimal.