Handshake circuits: an asynchronous architecture for VLSI programming
Handshake circuits: an asynchronous architecture for VLSI programming
Computer-aided synthesis and verification of gate-level timed circuits
Computer-aided synthesis and verification of gate-level timed circuits
Bounded Delay Timing Analysis of a Class of CSP Programs
Formal Methods in System Design
Asynchronous interface specification, analysis and synthesis
DAC '98 Proceedings of the 35th annual Design Automation Conference
Lazy transition systems: application to timing optimization of asynchronous circuits
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
General Conditions for the Decomposition of State-Holding Elements
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Verification of Speed-Dependences in Single-Rail Handshake Circuits
ASYNC '98 Proceedings of the 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems
RAPPID: An Asynchronous Instruction Length Decoder
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Verification of Delayed-Reset Domino Circuits Using ATACS
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Practical verification and synthesis of low latency asynchronous systems
Practical verification and synthesis of low latency asynchronous systems
What is the cost of delay insensitivity?
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
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