Highlight of VLSI at research Berkeley

Authors:
Carlo H. Séquin;A. Richard Newton;Alberto L. Sangiovanni-Vincentelli
Affiliations:
Electrical Engineering and Computer Sciences, University of California, Berkeley, CA;Electrical Engineering and Computer Sciences, University of California, Berkeley, CA;Electrical Engineering and Computer Sciences, University of California, Berkeley, CA
Venue:
ACM '86 Proceedings of 1986 ACM Fall joint computer conference
Year:
1986

Reduced instruction set computer architectures for VLSI

Reduced instruction set computer architectures for VLSI
Two-dimensional compaction by “zone refining”

DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
TimberWolf3.2: a new standard cell placement and global routing package

DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Chameleon: a new multi-layer channel router

DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Architecture of SOAR: Smalltalk on a RISC

ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
SPUR: A VLSI Multiprocessor Workstation

SPUR: A VLSI Multiprocessor Workstation
A VLSI RISC

Computer

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