Performance estimation of multiple-cache IP-based systems: case study of an interdependency problem and application of an extended shared memory model

Authors:
Sungjoo Yoo;Kyoungseok Rha;Youngchul Cho;Jinyong Jung;Kiyoung Choi
Affiliations:
Design Automation Laboratory, School of Electrical Engineering, Seoul National University, Seoul 151-742, Korea;Design Automation Laboratory, School of Electrical Engineering, Seoul National University, Seoul 151-742, Korea;Design Automation Laboratory, School of Electrical Engineering, Seoul National University, Seoul 151-742, Korea;Design Automation Laboratory, School of Electrical Engineering, Seoul National University, Seoul 151-742, Korea;Design Automation Laboratory, School of Electrical Engineering, Seoul National University, Seoul 151-742, Korea
Venue:
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Year:
2000

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Abstract

In estimating the performance of multiple-cache IP-based systems, we face a problem of interdependency between cache configuration and system behavior. In this paper, we investigate the effects of the interdependency on system performance in a case study. We present a method that gives fast and accurate estimation of system performance by simulating IP cores at the behavioral level with annotated delays and by simulating the multiple-cache communication architecture with an extended shared memory model. Experiments show the effectiveness of the proposed method.