Acyclic multi-way partitioning of Boolean networks
DAC '94 Proceedings of the 31st annual Design Automation Conference
Vector generation for maximum instantaneous current through supply lines for CMOS circuits
DAC '97 Proceedings of the 34th annual Design Automation Conference
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Power estimation starategies for a low-power security processor
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
RT-level vector selection for realistic peak power simulation
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Modeling and estimation of power supply noise using linear programming
Proceedings of the International Conference on Computer-Aided Design
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We present an integer-linear-programming-based approach for estimating the maximum instantaneous current through the power supply lines for CMOS circuits. It produces the exact solutions for the maximum instantaneous current for small circuits, and tight upper bounds for large circuits. We formulate the maximum instantaneous current estimation problem as an integer linear programming (ILP) problem, and solve the corresponding ILP formulae to obtain the exact solution. For large circuits we propose to partition the circuits, and apply our ILP-based approach for each sub-circuit. The sum of the exact solutions of all sub-circuits provides an upper bound of the exact solution for the entire circuit. Our experimental results show that the upper bounds produced by our approach combined with the lower bounds produced by a genetic-algorithm-based approach confine the exact solution to a small range.