Resolving signal correlations for estimating maximum currents in CMOS combinational circuits
DAC '93 Proceedings of the 30th international Design Automation Conference
Vector generation for maximum instantaneous current through supply lines for CMOS circuits
DAC '97 Proceedings of the 34th annual Design Automation Conference
Estimation of maximum power supply noise for deep sub-micron designs
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Estimation for maximum instantaneous current through supply lines for CMOS circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Exact and approximate estimation for maximum instantaneous current of CMOS circuits
Proceedings of the conference on Design, automation and test in Europe
Vector generation for power supply noise estimation and verification of deep submicron designs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Estimation of Switching Noise on Power Supply Lines in Deep Sub-micron CMOS Circuits
VLSID '00 Proceedings of the 13th International Conference on VLSI Design
ISQED '02 Proceedings of the 3rd International Symposium on Quality Electronic Design
Power Supply Noise in SoCs: Metrics, Management, and Measurement
IEEE Design & Test
Vectorless Estimation of Maximum Instantaneous Current for Sequential Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Exact and Heuristic Approaches to Input Vector Control for Leakage Power Reduction
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Power supply noise in nano-scale VLSI is one of the design concerns. Due to switching current of various logic gates, the actual supply voltage seen by different devices fluctuates, causing extra delays and ultimately intermittent faults during operation. Therefore, accurate estimation of worst case scenario, maximum noise and the vectors causing it, is extremely important for design, verification, and manufacturing test steps. In this paper we present a mixed-integer linear programming modeling of power supply noise in digital circuits to obtain fast and accurate solutions. Compared with accurate SPICE simulations of random vectors for a set of benchmark circuits, the proposed approach can achieve 13115x speedup while obtains 2.7% more optimization in average.