Using embedded FPGAs for SoC yield improvement
Proceedings of the 39th annual Design Automation Conference
BIST-Based Detection and Diagnosis of Multiple Faults in FPGAs
ITC '00 Proceedings of the 2000 IEEE International Test Conference
BIST-Based Delay-Fault Testing in FPGAs
Journal of Electronic Testing: Theory and Applications
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems
Combinatorial group testing methods for the BIST diagnosis problem
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Online Detection and Diagnosis of Multiple Configuration Upsets in LUTs of SRAM-Based FPGAs
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 - Volume 04
Cluster-based detection of SEU-caused errors in LUTs of SRAM-based FPGAs
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
Ontogenetic development and fault tolerance in the POEtic tissue
ICES'03 Proceedings of the 5th international conference on Evolvable systems: from biology to hardware
Online BIST and BIST-based diagnosis of FPGA logic blocks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A cost-efficient self-configurable BIST technique for testing multiplexer-based FPGA interconnect
Journal of Electronic Testing: Theory and Applications
On-line testing of permanent radiation effects in reconfigurable systems
Proceedings of the Conference on Design, Automation and Test in Europe
Memory block based scan-BIST architecture for application-dependent FPGA testing
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
| Hi-index | 0.00 |
We present a built-in self-test (BIST) approach able to detect and accurately diagnose all single and practically all multiple faulty programmable logic blocks (PLBs) in field programmable gate arrays (FPGAs) with maximum diagnostic resolution. Unlike conventional BIST, FPGA BIST does not involve any area overhead or performance degradation. We also identify and solve the problem of testing configuration multiplexers that was either ignored or incorrectly solved in most previous work. We introduce the first diagnosis method for multiple faulty PLBs; for any faulty PLB, we also identify its internal faulty modules or modes of operation. Our accurate diagnosis provides the basis for both failure analysis used for yield improvement and for any repair strategy used for fault-tolerance in reconfigurable systems. We present experimental results showing detection and identification of faulty PLBs in actual defective FPGAs. Our BIST architecture is easily scalable.