Online BIST and BIST-based diagnosis of FPGA logic blocks

Authors:
Miron Abramovici;Charles E. Stroud;John M. Emmert
Affiliations:
Design Automation for Flexible Chip Architectures, Framingham, MA;Department of Electrical and Computer Engineering, Auburn University, Auburn, AL;Department of Electrical and Computer Engineering, University of North Carolina at Charlotte, Charlotte, NC
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2004

Citing 25
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Abstract

We present the first online built-in self-test (BIST) and BIST-based diagnosis of programmable logic resources in field-programmable gate arrays (FPGAs). These techniques were implemented and used in a roving self-testing areas (STARs) approach to testing and reconfiguration of FPGAs for fault-tolerant applications. The BIST approach provides complete testing of the programmable logic blocks (PLBs) in the FPGA during normal system operation. The BIST-based diagnosis can identify any group of faulty PLBs, then applies additional diagnostic configurations to identify the faulty look-up table or flip-flop within a faulty PLB. The ability to locate defective modules inside a PLB enables a new form of fault-tolerance that reuses partially defective PLBs in their fault-free modes of operation.