On-line fault detection for bus-based field programmable gate arrays

Authors:
Nathan R. Shnidman;William H. Mangione-Smith;Miodrag Potkonjak
Affiliations:
Massachusetts Institute of Technology, Cambridge;Univ. of California, Los Angeles;Univ. of California, Los Angeles
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
1998

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Abstract

We introduce a technique for on-line built-in self-testing (BIST) of bus-based field programmable gate arrays (FPGAs). This system detects deviations from the intended functionality of an FPGA without using special-purpose hardware, hardware external to the device, and without interrupting system operation. Such a system would be useful for mission-critical applications with resource constraints. The system solves these problems through an on-line fault scanning methodology. A device's internal resources are configured to test for faults. Testing scans across an FPGA, checking a section at a time. Simulation on a model FPGA supports the viability and effectiveness of such a system.