Fault tolerant and fault testable hardware design
Fault tolerant and fault testable hardware design
Modeling Defect Spatial Distribution
IEEE Transactions on Computers
Field-programmable gate arrays
Field-programmable gate arrays
Testing of uncustomized segmented channel field programmable gate arrays
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
Field-programmable gate arrays: reconfigurable logic for rapid prototyping and implementation of digital systems
Plasma: an FPGA for million gate systems
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
Evaluation of FPGA resources for built-in self-test of programmable logic blocks
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
Hierarchical interconnection structures for field programmable gate arrays
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Introduction to IDDQ testing
Digital systems design and prototyping using field programmable logic
Digital systems design and prototyping using field programmable logic
Test and diagnosis of fault logic blocks in FPGAs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Methodologies for Tolerating Cell and Interconnect Faults in FPGAs
IEEE Transactions on Computers
Low overhead fault-tolerant FPGA systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Testing configurable LUT-based FPGA's
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IDDQ Testing of Bridging Faults in Logic Resources of Reconfigurable Field Programmable Gate Arrays
IEEE Transactions on Computers
On-line fault detection for bus-based field programmable gate arrays
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The design of an SRAM-based field-programmable gate array—part I: architecture
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The design of a SRAM-based field-programmable gate array—part II: circuit design and layout
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Novel technique for testing FPGAs
Proceedings of the conference on Design, automation and test in Europe
Field-Programmable Gate Array Technology
Field-Programmable Gate Array Technology
Shortening the Design Cycle for Programmable Logic
IEEE Design & Test
IEEE Design & Test
FPGA and CPLD Architectures: A Tutorial
IEEE Design & Test
FPGA Architectural Research: A Survey
IEEE Design & Test
Universal Fault Diagnosis for Lookup Table FPGAs
IEEE Design & Test
Testing the Interconnect of RAM-Based FPGAs
IEEE Design & Test
Using Laser Defect Avoidance to Build Large-Area FPGAs
IEEE Design & Test
On Routability for FPGAs under Faulty Conditions
IEEE Transactions on Computers
Defect Tolerant SRAM Based FPGAs
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
Configuration-Specific Test Pattern Extraction for Field Programmable Gate Arrays
DFT '97 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems
Testing of programmable logic devices (PLD) with faulty resources
DFT '97 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems
Multiple fault detection in logic resources of FPGAs
DFT '97 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems
Algorithms for Efficient Runtime Fault Recovery on Diverse FPGA Architectures
DFT '99 Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems
Transient and Permanent Fault Diagnosis for FPGA-Based TMR Systems
DFT '99 Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems
Defect and Fault Tolerance FPGAs by Shifting the Configuration Data
DFT '99 Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems
FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
Using ILA Testing for BIST in FPGAs
Proceedings of the IEEE International Test Conference on Test and Design Validity
On-Line Testable Logic Desgin for FPGA Implementation
Proceedings of the IEEE International Test Conference
BIST-Based Diagnostics of FPGA Logic Blocks
Proceedings of the IEEE International Test Conference
Built-in self-test of FPGA interconnect
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Detection of bridging faults in logic resources of configurable FPGAs using I_DDQ
ITC '98 Proceedings of the 1998 IEEE International Test Conference
IDDQ Testing of Input/Output Resources of SRAM-Based FPGAs
ATS '99 Proceedings of the 8th Asian Test Symposium
Testing the Logic Cells and Interconnect Resources for FPGAs
ATS '99 Proceedings of the 8th Asian Test Symposium
Minimizing the Number of Programming Steps for Diagnosis of Interconnect Faults in FPGAs
ATS '99 Proceedings of the 8th Asian Test Symposium
Universal test complexity of field-programmable gate arrays
ATS '95 Proceedings of the 4th Asian Test Symposium
A Test Methodology for Interconnect Structures of LUT-based FPGAs
ATS '96 Proceedings of the 5th Asian Test Symposium
Test Pattern and Test Configuration Generation Methodology for the Logic of RAM-Based FPGA
ATS '97 Proceedings of the 6th Asian Test Symposium
A XOR-Tree Based Technique for Constant Testability of Configurable FPGAs
ATS '97 Proceedings of the 6th Asian Test Symposium
Testing for the programming circuit of LUT-based FPGAs
ATS '97 Proceedings of the 6th Asian Test Symposium
On the Complexity of Universal Fault Diagnosis for Look-up Table FPGAs
ATS '97 Proceedings of the 6th Asian Test Symposium
Testing and Diagnosis of Interconnect Structures in FPGAs
ATS '98 Proceedings of the 7th Asian Test Symposium
A Diagnosis Method for Interconnects in SRAM Based FPGAs
ATS '98 Proceedings of the 7th Asian Test Symposium
Test Configuration Minimization for the Logic Cells of SRAM-Based FPGAs: A Case Study
ETW '99 Proceedings of the 1999 IEEE European Test Workshop
Design of an Automatic Testing for FPGAs
ETW '99 Proceedings of the 1999 IEEE European Test Workshop
A row-based FPGA for single and multiple stuck-at fault detection
DFT '95 Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
The Teramac Custom Computer: Extending the Limits with Defect Tolerance
DFT '96 Proceedings of the 1996 Workshop on Defect and Fault-Tolerance in VLSI Systems
Making defect avoidance nearly invisible to the user in wafer scale field programmable gate arrays
DFT '96 Proceedings of the 1996 Workshop on Defect and Fault-Tolerance in VLSI Systems
KITE: a behavioural approach to fault-tolerance in FPGA-based systems
DFT '96 Proceedings of the 1996 Workshop on Defect and Fault-Tolerance in VLSI Systems
Defect tolerance on the Teramac custom computer
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
A General Model for Reliability Maximization Problem under Given Redundancy
FTCS '97 Proceedings of the 27th International Symposium on Fault-Tolerant Computing (FTCS '97)
An Automatic Testing and Diagnosis for FPGAs
PRDC '99 Proceedings of the 1999 Pacific Rim International Symposium on Dependable Computing
Node-Covering Based Defect and Fault Tolerance Methods for Increased Yield in FPGAs
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
On the diagnosis of programmable interconnect systems: Theory and application
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
An approach for testing programmable/configurable field programmable gate arrays
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
Built-in self-test of logic blocks in FPGAs (Finally, a free lunch: BIST without overhead!)
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
Test of RAM-based FPGA: methodology and application to the interconnect
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
BIST-Based Detection and Diagnosis of Multiple Faults in FPGAs
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Using Roving STARs for On-Line Testing and Diagnosis of FPGAs in Fault-Tolerant Applications
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Efficient hardware checkpointing: concepts, overhead analysis, and implementation
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
Modeling and design of fault-tolerant and self-adaptive reconfigurable networked embedded systems
EURASIP Journal on Embedded Systems
Design of the EPLD-based reconfigurable fault-tolerant systems with cell-level redundancy
Automation and Remote Control
High manufacturing-defect tolerance optically programmable architecture
CSECS'06 Proceedings of the 5th WSEAS International Conference on Circuits, Systems, Electronics, Control & Signal Processing
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
Fault tolerant techniques for reconfigurable platforms
Proceedings of the 1st Amrita ACM-W Celebration on Women in Computing in India
Progress in autonomous fault recovery of field programmable gate arrays
ACM Computing Surveys (CSUR)
Self-healing reconfigurable logic using autonomous group testing
Microprocessors & Microsystems
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Topics related to the faults in SRAM-based field programmable gate arrays (FPGAs) have been intensively studied in recent research studies. These topics include FPGA fault detection, FPGA fault diagnosis, FPGA defect tolerance, and FPGA fault tolerance. This paper provides a guided tour to the approaches related to these topics. These include techniques, which are applied to the FPGA and others which have been recently introduced and can be applied to today's FPGAs.