On yield, fault distributions, and clustering of particles
IBM Journal of Research and Development
Correlation analysis of particle clusters on integrated circuit wafers
IBM Journal of Research and Development
Yield model for fault clusters within integrated circuits
IBM Journal of Research and Development
IBM Journal of Research and Development
A Unified Negative-Binomial Distribution for Yield Analysis of Defect-Tolerant Circuits
IEEE Transactions on Computers
A Clustered Failure Model for the Memory Array Reconfiguration Problem
IEEE Transactions on Computers
An Improved Analytical Yield Evaluation Method for Redundant RAM's
MTDT '98 Proceedings of the 1998 IEEE International Workshop on Memory Technology, Design and Testing
Detecting, diagnosing, and tolerating faults in SRAM-based field programmable gate arrays: a survey
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Predicting Defect-Tolerant Yield in the Embedded Core Context
IEEE Transactions on Computers
Simulation of reconfigurable memory core yield
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Application-independent defect tolerance of reconfigurable nanoarchitectures
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Constraint Bipartite Vertex Cover Simpler Exact Algorithms and Implementations
FAW '08 Proceedings of the 2nd annual international workshop on Frontiers in Algorithmics
Constraint bipartite vertex cover: simpler exact algorithms and implementations
Journal of Combinatorial Optimization
Communication in networks with random dependent faults
MFCS'07 Proceedings of the 32nd international conference on Mathematical Foundations of Computer Science
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The center-satellite model for describing the distribution of defects on wafers is discussed. This model assigns each defect to a cluster. The distribution of cluster centers on a wafer is one basic component of the model. The other basic component is the distribution of defects (satellites) about the cluster centers. Physical justification for the model is provided. Current yield models are quite accurate for VLSI designs without redundancy. A more flexible model is needed to evaluate the redundancy techniques that will be an integral part of WSI. An example is provided to demonstrate the type of analysis necessary to analyze fault-tolerant designs using the model. Empirical research needed to obtain parameters for the model is commented on, as is the need to reevaluate prior empirical research in which assumptions were made that are relaxed by the center-satellite model.