On yield, fault distributions, and clustering of particles

Correlation analysis of particle clusters on integrated circuit wafers

IBM Journal of Research and Development

A Reconfiguration Scheme for Yield Enhancement of Large Area Binary Tree Architectures

IEEE Transactions on Computers - Fault-Tolerant Computing

Modeling Defect Spatial Distribution

IEEE Transactions on Computers

On Fault-Tolerant Structure, Distributed Fault-Diagnosis, Reconfiguration, and Recovery of the Array Processors

IEEE Transactions on Computers

Large-area fault clusters and fault tolerance in VLSI circuits

IBM Journal of Research and Development

Small-area fault clusters and fault tolerance in VLSI circuits

IBM Journal of Research and Development

Synergistic Fault-Tolerance for Memory Chips

IEEE Transactions on Computers

Reliability, Reconfiguration, and Spare Allocation Issues in Binary-Tree Architectures Based on Multiple-Level Redundancy

IEEE Transactions on Computers

A Comprehensive Reconfiguration Scheme for Fault-Tolerant VLSI/WSI Array Processors

IEEE Transactions on Computers

A physical design tool for built-in self-repairable static RAMs

DATE '99 Proceedings of the conference on Design, automation and test in Europe

Yield modeling and BEOL fundamentals

Proceedings of the 2001 international workshop on System-level interconnect prediction

A Clustered Failure Model for the Memory Array Reconfiguration Problem

IEEE Transactions on Computers

Improved Yield Models for Fault-Tolerant Memory Chips

IEEE Transactions on Computers

Yield Analysis of Reconfigurable Array Processors Based on Multiple-Level Redundancy

IEEE Transactions on Computers

CAD computation for manufacturability: can we save VLSI technology from itself?

Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design

Yield projection from defect monitors: the influence of gross defects [BiCMOS process]

DFT '95 Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems

Predicting Defect-Tolerant Yield in the Embedded Core Context

IEEE Transactions on Computers

Memory Defect Tolerance Architectures for Nanotechnologies

Journal of Electronic Testing: Theory and Applications

Yield equation formulas

Microelectronic Engineering

Fault clustering in deep-submicron CMOS processes

Proceedings of the conference on Design, automation and test in Europe

An ROBDD-based combinatorial method for the evaluation of yield of defect-tolerant systems-on-chip

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Probabilistic diagnosis of clustered faults for shared structures

Mathematical and Computer Modelling: An International Journal

Communication in networks with random dependent faults

MFCS'07 Proceedings of the 32nd international conference on Mathematical Foundations of Computer Science

A Novel Wafer Manipulation Method for Yield Improvement and Cost Reduction of 3D Wafer-on-Wafer Stacked ICs

Journal of Electronic Testing: Theory and Applications