The effects of wafer to wafer defect density variations on integrated circuit defect and fault distributions

Authors:
C. H. Stapper
Affiliations:
IBM General Technology Division, Burlington facility, Essex Junction, Vermont
Venue:
IBM Journal of Research and Development
Year:
1985

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Abstract

A method for modeling the variations in defect levels in circuits produced on modern integrated circuit manufacturing lines is described in this paper. The effects on defect and fault distributions are derived. A deficiency in some previous yield models is eliminated.