An Improved Analytical Yield Evaluation Method for Redundant RAM's

Authors:
Gianluca Battaglini;Bruno Ciciani
Affiliations:
-;-
Venue:
MTDT '98 Proceedings of the 1998 IEEE International Workshop on Memory Technology, Design and Testing
Year:
1998

Citing 8
Cited 0

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Abstract

A new stochastic method is introduced for calculating the manufacturing yield of fault-tolerant VLSI/WSI systems. This method is the improvement of a previous method based on a Markov chain. This new method gives a higher lower bound value of the yield with respect to other methods based on the same assumptions. This improvement is obtained by the consideration of reconfiguration strategies based on the knowledge of the Fault Patterns and the redundancy levels. The proposed method is easy to use in parametric studies of the yield of a chip versus redundancy level and very versatile for inclusion in CAM/CAD programming environments.