Field-programmable gate arrays
Field-programmable gate arrays
Functional Testing of Semiconductor Random Access Memories
ACM Computing Surveys (CSUR)
Field-Programmable Gate Array Technology
Field-Programmable Gate Array Technology
A Test Methodology Applied to Cellular Logic Programmable Gate Arrays
FPL '94 Proceedings of the 4th International Workshop on Field-Programmable Logic and Applications: Field-Programmable Logic, Architectures, Synthesis and Applications
Fault Modeling and Test Generation for FPGAs
FPL '94 Proceedings of the 4th International Workshop on Field-Programmable Logic and Applications: Field-Programmable Logic, Architectures, Synthesis and Applications
Easily Testable Iterative Systems
IEEE Transactions on Computers
Test and diagnosis of fault logic blocks in FPGAs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Testing the configurable interconnect/logic interface of SRAM-based FPGA's
DATE '99 Proceedings of the conference on Design, automation and test in Europe
SRAM-Based FPGAs: Testing the Embedded RAM Modules
Journal of Electronic Testing: Theory and Applications - Special issue on the IEEE European Test Workshop
An Approach to Minimize the Test Configuration for the Logic Cells of the Xilinx XC4000 FPGAs Family
Journal of Electronic Testing: Theory and Applications - special issue on the European test workshop 1999
Detection of Delay Faults in Memory Address Decoders
Journal of Electronic Testing: Theory and Applications
Sequential Fault Modeling and Test Pattern Generation for CMOS Iterative Logic Arrays
IEEE Transactions on Computers
Testing the Local Interconnect Resources of SRAM-Based FPGA's
Journal of Electronic Testing: Theory and Applications - Special Issue on the 7th ASIAN TEST SYMPOSIUM, ATS-98
RAM-based FPGA's: a test approach for the configurable logic
Proceedings of the conference on Design, automation and test in Europe
Novel technique for testing FPGAs
Proceedings of the conference on Design, automation and test in Europe
Universal Fault Diagnosis for Lookup Table FPGAs
IEEE Design & Test
Testing the Interconnect of RAM-Based FPGAs
IEEE Design & Test
A Specific Test Methodology for Symmetric SRAM-Based FPGAs
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
SRAM-based FPGA's: testing the LUT/RAM modules
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Tunable Fault Tolerance for Runtime Reconfigurable Architectures
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Test of RAM-based FPGA: methodology and application to the interconnect
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Different Experiments in Test Generation for XILINX FPGAs
ITC '00 Proceedings of the 2000 IEEE International Test Conference
ITC '01 Proceedings of the 2001 IEEE International Test Conference
Detecting, diagnosing, and tolerating faults in SRAM-based field programmable gate arrays: a survey
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
A Self-Test of Dynamically Reconfigurable Processors with Test Frames
IEICE - Transactions on Information and Systems
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A field-programmable gate array (FPGA) can implement arbitrary logic circuits in the field. In this paper we consider universal test such that when applied to an unprogrammed FPGA, it ensures that all the corresponding programmed logic circuits on the FPGA are fault-free. We focus on testing for look-up tables in FPGAs, and present two types of programming schemes; sequential loading and random access loading. Then we show test procedures for the FPGAs with these programming schemes and their test complexities. In order to make the test complexity for FPGAs independent of the array size of the FPGAs, we propose a programming scheme called block-sliced loading, which makes FPGAs C-testable.