Test and diagnosis of fault logic blocks in FPGAs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Efficiently supporting fault-tolerance in FPGAs
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Methodologies for Tolerating Cell and Interconnect Faults in FPGAs
IEEE Transactions on Computers
IDDQ Testing of Bridging Faults in Logic Resources of Reconfigurable Field Programmable Gate Arrays
IEEE Transactions on Computers
Testing the configurable interconnect/logic interface of SRAM-based FPGA's
DATE '99 Proceedings of the conference on Design, automation and test in Europe
SRAM-Based FPGAs: Testing the Embedded RAM Modules
Journal of Electronic Testing: Theory and Applications - Special issue on the IEEE European Test Workshop
Self-replicating and self-repairing multicellular automata
Artificial Life - Special issue on self-replication
An Approach to Minimize the Test Configuration for the Logic Cells of the Xilinx XC4000 FPGAs Family
Journal of Electronic Testing: Theory and Applications - special issue on the European test workshop 1999
Testing the Local Interconnect Resources of SRAM-Based FPGA's
Journal of Electronic Testing: Theory and Applications - Special Issue on the 7th ASIAN TEST SYMPOSIUM, ATS-98
RAM-based FPGA's: a test approach for the configurable logic
Proceedings of the conference on Design, automation and test in Europe
Novel technique for testing FPGAs
Proceedings of the conference on Design, automation and test in Europe
Journal of Electronic Testing: Theory and Applications
Universal Fault Diagnosis for Lookup Table FPGAs
IEEE Design & Test
Testing the Interconnect of RAM-Based FPGAs
IEEE Design & Test
IEEE Design & Test
A Specific Test Methodology for Symmetric SRAM-Based FPGAs
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Built-in self-test of FPGA interconnect
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Detection of bridging faults in logic resources of configurable FPGAs using I_DDQ
ITC '98 Proceedings of the 1998 IEEE International Test Conference
SRAM-based FPGA's: testing the LUT/RAM modules
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Fault Scanner for Reconfigurable Logic
ARVLSI '97 Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97)
Tunable Fault Tolerance for Runtime Reconfigurable Architectures
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Test of RAM-based FPGA: methodology and application to the interconnect
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Bridging Fault Extraction from Physical Design Data for Manufacturing Test Development
ITC '00 Proceedings of the 2000 IEEE International Test Conference
BIST-Based Detection and Diagnosis of Multiple Faults in FPGAs
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Different Experiments in Test Generation for XILINX FPGAs
ITC '00 Proceedings of the 2000 IEEE International Test Conference
IS-FPGA: A New Symmetric FPGA Architecture with Implicit SCAN
ITC '01 Proceedings of the 2001 IEEE International Test Conference
ITC '01 Proceedings of the 2001 IEEE International Test Conference
BIST-Based Diagnostics of FPGA Logic Blocks
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Improving On-Line BIST-Based Diagnosis for Roving STARs
IOLTW '00 Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW)
Using Roving STARs for On-Line Testing and Diagnosis of FPGAs in Fault-Tolerant Applications
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Detecting, diagnosing, and tolerating faults in SRAM-based field programmable gate arrays: a survey
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Online Detection and Diagnosis of Multiple Configuration Upsets in LUTs of SRAM-Based FPGAs
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 - Volume 04
High-diagnosability online built-in self-test of FPGAs via iterative bootstrapping
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Cluster-based detection of SEU-caused errors in LUTs of SRAM-based FPGAs
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Efficient on-line interconnect testing in FPGAs with provable detectability for multiple faults
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Test, diagnosis and fault simulation of embedded RAM modules in SRAM-based FPGAs
Microelectronic Engineering
Online BIST and BIST-based diagnosis of FPGA logic blocks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This paper presents a new general technique for testing field programmable gate arrays (FPGAs) by fully exploiting their programmable and configurable characteristics. A hybrid fault model is introduced based on a physical and behavioral characterization; this permits the detection of a single fault, as either a stuck-at or a functional fault. A general approach which regards testing as can application for the reconfigurable FPGA, is then proposed. It is shown that different arrangements of disjoint one-dimensional arrays with unilateral horizontal connections and common vertical input lines provide a very good solution. A further feature that is considered for array testing, is the relation between the configuration of the logic blocks and the number of I/O pins in the chip. As an example, the proposed approach is applied for testing the Xilinz 4000 family of FPGAs.