The Teramac Custom Computer: Extending the Limits with Defect Tolerance

  • Authors:
  • W. B. Culbertson;R. Amerson;R. J. Carter;P. Kuekes;G. Snider

  • Affiliations:
  • -;-;-;-;-

  • Venue:
  • DFT '96 Proceedings of the 1996 Workshop on Defect and Fault-Tolerance in VLSI Systems
  • Year:
  • 1996

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Abstract

Teramac is a reconfigurable custom computer, capable of running million-gate user designs at one megahertz and out-performing workstations a hundred-fold on highly parallel applications. It achieves these results in spite of thousands of defects. Teramac, composed of 1728 field programmable gate arrays and over a quarter million interconnections, was made possible by a very broad use of defect tolerance. Given a user design and a defect database, a compiler creates a Teramac configuration that implements the design and makes no use of defective resources in the system. System characterization software precisely locates defective resources so that the vast majority of good resources may be applied to user designs. Defect tolerance reduces the cost of Teramac systems by increasing the yields of usable parts and by permitting the use of low-cost components that would otherwise be prohibitively unreliable.