Configuration of VLSI Arrays in the Presence of Defects
Journal of the ACM (JACM)
A Network Flow Approach to the Reconfiguration of VLSI Arrays
IEEE Transactions on Computers
Efficiently supporting fault-tolerance in FPGAs
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
A fast routability-driven router for FPGAs
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Methodologies for Tolerating Cell and Interconnect Faults in FPGAs
IEEE Transactions on Computers
Spare allocation and reconfiguration in large area VLSI
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
On-line fault detection for bus-based field programmable gate arrays
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Tolerating operational faults in cluster-based FPGAs
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
Efficient incremental rerouting for fault reconfiguration in field programmable gate arrays
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
SLIP '02 Proceedings of the 2002 international workshop on System-level interconnect prediction
Design Methodologies for Tolerating Cell and Interconnect Faults in FPGAs
ICCD '96 Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors
Algorithms for Efficient Runtime Fault Recovery on Diverse FPGA Architectures
DFT '99 Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems
On-Line Fault Tolerance for FPGA Interconnect with Roving STARs
DFT '01 Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems
FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
Efficient Network-Flow Based Techniques for Dynamic Fault Reconfiguration in FPGAs
FTCS '99 Proceedings of the Twenty-Ninth Annual International Symposium on Fault-Tolerant Computing
Fault-tolerant wafer-scale architectures for VLSI
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Node-Covering Based Defect and Fault Tolerance Methods for Increased Yield in FPGAs
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Online fault tolerance for FPGA logic blocks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Fault tolerant placement and defect reconfiguration for nano-FPGAs
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Tile-Based Fault Tolerant Approach Using Partial Reconfiguration
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
Fault tolerant techniques for reconfigurable platforms
Proceedings of the 1st Amrita ACM-W Celebration on Women in Computing in India
An evaluation of a slice fault aware tool chain
Proceedings of the Conference on Design, Automation and Test in Europe
Using partial dynamic FPGA reconfiguration to support real-time dependability
EWDC '11 Proceedings of the 13th European Workshop on Dependable Computing
Progress in autonomous fault recovery of field programmable gate arrays
ACM Computing Surveys (CSUR)
The survivability of design-specific spare placement in FPGA architectures with high defect rates
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Fault tolerant system design and SEU injection based testing
Microprocessors & Microsystems
Self-healing reconfigurable logic using autonomous group testing
Microprocessors & Microsystems
A low-cost fault tolerant solution targeting commercial FPGA devices
Journal of Systems Architecture: the EUROMICRO Journal
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A wide range of fault tolerance methods for FPGAs have been proposed. Approaches range from simple architectural redundancy to fully on-line adaptive implementations. The applications of these methods also differ; some are used only for manufacturing yield enhancement, while others can be used in-system. This survey attempts to provide an overview of the current state of the art for fault tolerance in FPGAs. It is assumed that faults have been previously detected and diagnosed; the methods presented are targeted towards tolerating the faults. A detailed description of each method is presented. Where applicable, the methods are compared using common metrics. Results are summarized to present a succinct, comprehensive comparison of the different approaches.