Post-pass binary adaptation for software-based speculative precomputation

  • Authors:

  • Steve S.W. Liao;Perry H. Wang;Hong Wang;Gerolf Hoflehner;Daniel Lavery;John P. Shen

  • Affiliations:

  • Intel Labs;Intel Labs;Intel Labs;Intel Labs;Intel Labs;Intel Labs

  • Venue:
  • PLDI '02 Proceedings of the ACM SIGPLAN 2002 Conference on Programming language design and implementation
  • Year:
  • 2002

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Abstract

Recently, a number of thread-based prefetching techniques have been proposed. These techniques aim at improving the latency of single-threaded applications by leveraging multithreading resources to perform memory prefetching via speculative prefetch threads. Software-based speculative precomputation (SSP) is one such technique, proposed for multithreaded Itanium models. SSP does not require expensive hardware support-instead it relies on the compiler to adapt binaries to perform prefetching on otherwise idle hardware thread contexts at run time. This paper presents a post-pass compilation tool for generating SSP-enhanced binaries. The tool is able to: (1) analyze a single-threaded application to generate prefetch threads; (2) identify and embed trigger points in the original binary; and (3) produce a new binary that has the prefetch threads attached. The execution of the new binary spawns the speculative prefetch threads, which are executed concurrently with the main thread. Our results indicate that for a set of pointer-intensive benchmarks, the prefetching performed by the speculative threads achieves an average of 87% speedup on an in-order processor and 5% speedup on an out-of-order processor.