A high-level design and optimization tool for analog RF receiver front-ends
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
A power estimation model for high-speed CMOS A/D converters
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Low-Power Design Techniques and CAD Tools for Analog and RF Integrated Circuits: Based on Selected Partner Contributions of the European Community ESP
ACTIF: a high-level power estimation tool for analog continuous-time filters
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Top-down heterogeneous synthesis of analog and mixed-signal systems
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Classification of analog synthesis tools based on their architecture selection mechanisms
Integration, the VLSI Journal
Optimal power and noise allocation for analog and digital sections of a low power radio receiver
Proceedings of the 13th international symposium on Low power electronics and design
ANTIGONE: Top-down creation of analog-to-digital converter architectures
Integration, the VLSI Journal
A system level energy model and energy-quality evaluation for integrated transceiver front-ends
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An automated high-level topology generation procedure for continuous-time ΣΔ modulator
Integration, the VLSI Journal
Empirical method based on neural networks for analog power modeling
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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This paper describes methods for analog-power estimation and practically applies them to two different classes of analog circuits. Such power estimators, that return a power estimate given only a block's specification values without knowing its detailed circuit implementation, are valuable components for architectural exploration tools and hence interesting for high-level system designers. As an illustration, two estimators are presented: one for high-speed analog-to-digital converters (ADCs) and one for analog-continuous time filters. The ADC power estimator is a technology scalable closed formula and yields first-order results within an accuracy factor of about 2.2 for the whole class of high-speed Nyquist-rate ADCs. The filter-power estimator is of a more complex nature. It uses a crude filter synthesis, in combination with operational transconductor amplifier behavioral models to generate accurate results as well, but restricted to certain filter implementations.