Multilayer feedforward networks are universal approximators
Neural Networks
A survey of power estimation techniques in VLSI circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
System-level power estimation and optimization
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Power modeling for high-level power estimation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Cycle-accurate energy measurement and characterization with a case study of the ARM7TDMI
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Power estimation methods for analog circuits for architectural exploration of integrated systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ACTIF: a high-level power estimation tool for analog continuous-time filters
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Lookup Table Power Macro-Models for Behavioral Library Components
VOLTA '99 Proceedings of the IEEE Alessandro Volta Memorial Workshop on Low-Power Design
Energy and peak-current per-cycle estimation at RTL
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Energy Profiler for Hardware/Software Co-Design
VLSID '04 Proceedings of the 17th International Conference on VLSI Design
Power estimation techniques for FPGAs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Cycle-Accurate Energy Measurement and Characterization of FPGAs
Analog Integrated Circuits and Signal Processing
High-level area and power estimation for VLSI circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Analytical models for RTL power estimation of combinational and sequential circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Early power estimation for VLSI circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| Hi-index | 0.03 |
We introduce an empirical method for power consumption modeling of analog components at system level. The principal step of this method uses neural networks to approximate the mathematical curve of the power consumption as a function of the inputs and parameters of the analog component. For a node of a wireless sensors network, we found an average error of 1.53% with a maximum error of 3.06% between our estimation and the measured power consumption. This novel method is suitable for Platform-Based Design and has three key features for architecture exploration purposes. Firstly, the method is generic as it can be applied to any analog component in any modeling and simulation environment. Secondly, the method is suitable for the total (analog and digital) power consumption estimation of a heterogeneous system. Thirdly, the method provides an online estimation of the instantaneous power consumption of analog blocks.