SWAMI: a flexible logic implementation system
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
The Silc silicon compiler: language and features
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
SOCRATES: a system for automatically synthesizing and optimizing combinational logic
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Logic synthesis and optimization benchmarks for the 1986 Design Automation Conference
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
MACDAS: multi-level AND-OR circuit synthesis using two-variable function generators
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
A high level synthesis tool for MOS chip design
DAC '84 Proceedings of the 21st Design Automation Conference
SpC: synthesis of pointers in C: application of pointer analysis to the behavioral synthesis from C
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Hardware synthesis from C/C++ models
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Automated BIST for Sequential Logic Synthesis
IEEE Design & Test
The Challenges of Hardware Synthesis from C-Like Languages
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
The Challenges of Synthesizing Hardware from C-Like Languages
IEEE Design & Test
CHiMPS: a high-level compilation flow for hybrid CPU-FPGA architectures
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
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The Cones synthesis system for automatic generation of VLSI implementations is discussed. Named for the cones in sequential logic, Cones takes behavioral models written in C and produces gate-level implementations in technologies such as standard cells and programmable logic arrays or programmable logic devices. The overall design is produced faster, more efficiently, and with fewer errors. Designers are free to concentrate on functions, instead of on the details of the implementation technology.