Built-in test for VLSI: pseudorandom techniques
Built-in test for VLSI: pseudorandom techniques
Accelerated transition fault simulation
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Parallel computation of non-deterministic algorithms in vlsi
Parallel computation of non-deterministic algorithms in vlsi
TTL Cookbook
Cellular automata circuits for built-in self test
IBM Journal of Research and Development
Pseudorandom Testing for Boundary-Scan Design with Built-In Self-Test
IEEE Design & Test
An object-oriented approach to the concurrent engineering of electronics assemblies
Computers in Industry
A test methodology to support an ASEM MCM foundry
ITC'94 Proceedings of the 1994 international conference on Test
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The authors propose a way to merge boundary scan with the built-in self-test (BIST) of printed circuit boards. Their boundary-scan structure is based on Version 2.0 of the Joint Task Action Group's recommendations for boundary scan and incorporates BIST using a register based on cellular automata (CA) techniques. They examine test patterns generated from this register and the more conventional linear-feedback shift register. The advantages of the CA register, or CAR, are its modularity, which allows modification without major redesign, its higher stuck-at fault coverage, and its higher transition fault coverage.