A simplified six-waveform type method for delay fault testing
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A method of delay fault test generation
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Analysis of timing failures due to random AC defects in VLSI modules
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Failure Diagnosis of Structured VLSI
IEEE Design & Test
Critical path tracing - an alternative to fault simulation
DAC '83 Proceedings of the 20th Design Automation Conference
DAC '77 Proceedings of the 14th Design Automation Conference
Timing-reasoning-based delay fault diagnosis
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Multiple-fault diagnosis based on single-fault activation and single-output observation
Proceedings of the conference on Design, automation and test in Europe: Proceedings
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A delay fault diagnosis process consisting of simulation of the fault-free circuit with a four-valued logic algebra and critical-path tracing from primary outputs to primary inputs is presented. An alternative to fault simulation, the method requires no delay-size-based fault models and considers only the fault-free circuit. A sensitivity analysis process for improving diagnosis accuracy is also presented.