Designing an Asynchronous Communications Chip
IEEE Design & Test
Performance-driven synthesis of asynchronous controllers
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Unifying synchronous/asynchronous state machine synthesis
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Automatic synthesis of 3D asynchronous state machines
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Optimised state assignment for asynchronous circuit synthesis
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
Control Resynthesis for Control-Dominated Asynchronous Designs
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Automatic synthesis of gate-level timed circuits with choice
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
Algorithms for the optimal state assignment of asynchronous state machines
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
Proceedings of the 41st annual Design Automation Conference
Verification and implementation of delay-insensitive processes in restrictive environments
Fundamenta Informaticae - Special issue on application of concurrency to system design (ACSD'04)
Behavioral synthesis of asynchronous circuits using syntax directed translation as backend
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Cycle period analysis and optimization of timed circuits
ACSAC'06 Proceedings of the 11th Asia-Pacific conference on Advances in Computer Systems Architecture
Verification and Implementation of Delay-Insensitive Processes in Restrictive Environments
Fundamenta Informaticae - APPLICATION OF CONCURRENCY TO SYSTEM DESIGN (ACSD'04)
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