Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
The program dependence graph and its use in optimization
ACM Transactions on Programming Languages and Systems (TOPLAS)
Experiments on slicing-based debugging aids
Papers presented at the first workshop on empirical studies of programmers on Empirical studies of programmers
Integrating noninterfering versions of programs
ACM Transactions on Programming Languages and Systems (TOPLAS)
Interprocedural slicing using dependence graphs
ACM Transactions on Programming Languages and Systems (TOPLAS)
Identifying the semantic and textual differences between two versions of a program
PLDI '90 Proceedings of the ACM SIGPLAN 1990 conference on Programming language design and implementation
Using Program Slicing in Software Maintenance
IEEE Transactions on Software Engineering
Incremental program testing using program dependence graphs
POPL '93 Proceedings of the 20th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Automated support for legacy code understanding
Communications of the ACM
Precise executable interprocedural slices
ACM Letters on Programming Languages and Systems (LOPLAS)
Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
A new model of program dependences for reverse engineering
SIGSOFT '94 Proceedings of the 2nd ACM SIGSOFT symposium on Foundations of software engineering
SIGSOFT '94 Proceedings of the 2nd ACM SIGSOFT symposium on Foundations of software engineering
Precise interprocedural chopping
SIGSOFT '95 Proceedings of the 3rd ACM SIGSOFT symposium on Foundations of software engineering
Program analysis via graph reachability
ILPS '97 Proceedings of the 1997 international symposium on Logic programming
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Program Specialization via Program Slicing
Selected Papers from the Internaltional Seminar on Partial Evaluation
The program dependence graph in a software development environment
SDE 1 Proceedings of the first ACM SIGSOFT/SIGPLAN software engineering symposium on Practical software development environments
A Survey of Program Slicing Techniques.
A Survey of Program Slicing Techniques.
Program slices: formal, psychological, and practical investigations of an automatic program abstraction method
Automated Source-Level Error Localization in Hardware Designs
IEEE Design & Test
Scaling probabilistic timing verification of hardware using abstractions in design source code
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Evaluating the effectiveness of slicing for model reduction of concurrent object-oriented programs
TACAS'06 Proceedings of the 12th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Automated feature localization for hardware designs using coverage metrics
Proceedings of the 49th Annual Design Automation Conference
Word level feature discovery to enhance quality of assertion mining
Proceedings of the International Conference on Computer-Aided Design
Scaling RTL property checking using feasible path analysisand decomposition
Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI
Tuning dynamic data flow analysis to support design understanding
Proceedings of the Conference on Design, Automation and Test in Europe
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Hardware description languages (HDLs) are used today to describe circuits at all levels. In large HDL programs, there is a need for source code reduction techniques to address a myriad of problems in formal verification, design, simulation, and testing. Program slicing is a static program analysis technique that allows an analyst to automatically extract portions of programs relevant to the aspects being analyzed. We extend program slicing to HDLs, thus allowing for automatic program reduction to allow the user to focus on relevant code portions. We have implemented a VHDL slicing tool composed of a general inter-procedural slicer and a front-end that captures VHDL execution semantics. This paper provides an overview of program slicing, a discussion of how to slice VHDL programs, a description of the resulting tool, and a brief overview of some applications and experimental results.