DAC '98 Proceedings of the 35th annual Design Automation Conference
Guarded commands, nondeterminacy and formal derivation of programs
Communications of the ACM
Automatic predicate abstraction of C programs
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
Program Slicing of Hardware Description Languages
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Assertion-Based Design
Feature selection in data mining
Data mining
Word level predicate abstraction and refinement for verifying RTL verilog
Proceedings of the 42nd annual Design Automation Conference
IODINE: a tool to automatically infer dynamic invariants for hardware designs
Proceedings of the 42nd annual Design Automation Conference
The Daikon system for dynamic detection of likely invariants
Science of Computer Programming
Hybrid CEGAR: combining variable hiding and predicate abstraction
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
The temporal logic of programs
SFCS '77 Proceedings of the 18th Annual Symposium on Foundations of Computer Science
Automatic generation of complex properties for hardware designs
Proceedings of the conference on Design, automation and test in Europe
Simulation-directed invariant mining for software verification
Proceedings of the conference on Design, automation and test in Europe
SCEMIT: a systemc error and mutation injection tool
Proceedings of the 47th Design Automation Conference
Scalable specification mining for verification and diagnosis
Proceedings of the 47th Design Automation Conference
GoldMine: automatic assertion generation using data mining and static analysis
Proceedings of the Conference on Design, Automation and Test in Europe
Automatic assertion extraction via sequential data mining of simulation traces
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Data Mining: Concepts and Techniques
Data Mining: Concepts and Techniques
Automatic generation of compact formal properties for effective error detection
Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis
Diagnosing root causes of system level performance violations
Proceedings of the International Conference on Computer-Aided Design
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Automatic assertion generation methodologies based on machine learning generate assertions at bit level. These bit level assertions are numerous, making them unreadable and frequently unusable. We propose a methodology to discover word level features using static and dynamic analysis of the RTL source code. We use discovered word level features for the underlying learning algorithms to generate word level assertions. A post processing of assertions is employed to remove redundant propositions. Experimental results on Ethernet MAC, I2C, and OpenRISC designs show that the generated word level assertions have higher expressiveness and readability than their corresponding bit level assertions.