GoldMine: automatic assertion generation using data mining and static analysis

  • Authors:
  • Shobha Vasudevan;David Sheridan;Sanjay Patel;David Tcheng;Bill Tuohy;Daniel Johnson

  • Affiliations:
  • University of Illinois at Urbana Champaign;University of Illinois at Urbana Champaign;University of Illinois at Urbana Champaign;University of Illinois at Urbana Champaign;University of Illinois at Urbana Champaign;University of Illinois at Urbana Champaign

  • Venue:
  • Proceedings of the Conference on Design, Automation and Test in Europe
  • Year:
  • 2010

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Abstract

We present GoldMine, a methodology for generating assertions automatically. Our method involves a combination of data mining and static analysis of the Register Transfer Level (RTL) design. We present results of using GoldMine for assertion generation of the RTL of a 1000-core processor design that is still in an evolving stage. Our results show that GoldMine can generate complex, high coverage assertions in RTL, thereby minimizing human effort in this process.