Power analysis of embedded software: a first step towards software power minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Instruction level power analysis and optimization of software
Journal of VLSI Signal Processing Systems - Special issue on technologies for wireless computing
Power analysis and minimization techniques for embedded DSP software
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Cycle-accurate simulation of energy consumption in embedded systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
An Accurate Instruction-Level Energy Consumption Model for Embedded RISC Processors
OM '01 Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems
Instruction-based system-level power evaluation of system-on-a-chip peripheral cores
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Cycle-accurate energy measurement and characterization with a case study of the ARM7TDMI
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Software Power Estimation and Optimization for High Performance, 32-bit Embedded Processors
ICCD '98 Proceedings of the International Conference on Computer Design
An AMBA AHB-based reconfigurable SOC architecture using multiplicity of dedicated flyby DMA blocks
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Instruction level energy modeling for pipelined processors
Journal of Embedded Computing - Low-power Embedded Systems
A precise high-level power consumption model for embedded systems software
EURASIP Journal on Embedded Systems
Energy-Aware system-on-chip for 5 GHz wireless LANs
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
| Hi-index | 0.00 |
Energy constraints form an important part of the design specification for processors running embedded applications. For estimating energy dissipation early at the design cycle, accurate power consumption models characterized for the processor are essential. A methodology and the corresponding instrumentation setup for taking current measurements to create high quality instruction level power models, are discussed in this paper. The instantaneous current drawn by the processor is monitored at each clock cycle. A high performance instrumentation setup has been established for the accurate measurement of the processor current, which is based on a current sensing circuit, instead of the conventional solution of a series resistor.