A hybrid adiabatic content addressable memory for ultra low-power applications

Authors:
Aiyappan Natarajan;David Jasinski;Wayne Burleson;Russell Tessier
Affiliations:
University of Massachusetts Amherst, MA;University of Massachusetts Amherst, MA;University of Massachusetts Amherst, MA;University of Massachusetts Amherst, MA
Venue:
Proceedings of the 13th ACM Great Lakes symposium on VLSI
Year:
2003

Citing 6
Cited 1

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Abstract

This paper presents a hybrid adiabatic content addressable memory (CAM). The CAM uses an adiabatic switching technique to reduce the energy consumption in the match line while keeping the performance for the read/write operation. The adiabatic CAM is suitable for ultra low-power, low performance applications such as smart cards and portable devices. This CAM uses a clocked power supply for the match line while the rest of the circuit is the same as the basic CAM. A novel smart card application which uses the adiabatic CAM is illustrated. The circuit simulations for a 16x16 and 32x32 CAM were done in Hspice using 0.18 μm Berkeley models and the energy dissipation was compared with a basic CAM. The results show three orders of magnitude in energy savings for the 16x16 CAM and one order of magnitude savings for the 32x32 CAM when operated at 2Mhz. The maximum frequency of operation for which there was considerable energy savings was found to be 200 Mhz with a 20% and 45% energy savings for 16x16 and 32x32 CAM respectively.