Module placement on BSG-structure and IC layout applications
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Cluster refinement for block placement
DAC '97 Proceedings of the 34th annual Design Automation Conference
An O-tree representation of non-slicing floorplan and its applications
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A new algorithm for floorplan design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
An enhanced perturbing algorithm for floorplan design using the O-tree representation
ISPD '00 Proceedings of the 2000 international symposium on Physical design
ISPD '00 Proceedings of the 2000 international symposium on Physical design
VLSI floorplanning with boundary constraints based on corner block list
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Floorplanning with abutment constraints and L-shpaed/T-shaped blocks baed on corner block list
Proceedings of the 38th annual Design Automation Conference
Corner block list: an effective and efficient topological representation of non-slicing floorplan
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
VLSI module placement based on rectangle-packing by the sequence-pair
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fast evaluation of bounded slice-line grid
Journal of Computer Science and Technology
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A non-slicing approach, Corner Block List (CBL), has been presented recently. Since CBL only can represent floorplans without empty rooms, the algorithm based on CBL cannot get the optimum placement. In this paper, an extended corner block list. ECBLλ, is proposed. It can represent non-slicing floorplan including empty rooms. Based on the optimum solution theorem of BSG (bounded-sliceline grid), it is proved that the solution space of ECBLn, where n is the number of blocks, contains the optimum block placement with the minimum area. A placement algorithm based on ECBLλ, whose solution space can be controlled by setting λ the extending ratio, is completed. When λ is set as n, the algorithm based on ECBLn is the optimum placement search algorithm. Experiments show that λ has a reasonable constant range for building block layout problem, so the algorithm can translate an ECBLλ representation to its corresponding placement in O(n) time. Experimental results on MCNC benchmarks show promising performance with 7% improvement in wire length and 2% decrease in dead space over algorithms based on CBL. Meanwhile, compared with other algorithms, the proposed algorithm can get better results with less runtime.