Efficient implementation of retiming
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
DELAY: an efficient tool for retiming with realistic delay modeling
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
A fresh look at retiming via clock skew optimization
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Retiming sequential circuits for low power
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
A Practical Algorithm for Retiming Level-Clocked Circuits
ICCD '96 Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors
Retiming revisited and reversed
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Utilizing the retiming-skew equivalence in a practical algorithm for retiming large circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Retiming is a technique for optimizing sequential circuits. In this paper, we discuss this problem and propose an improved retiming algorithm based on variables bounding. Through the computation of the lower and upper bounds on variables, the algorithm can significantly reduce the number of constraints and speed up the execution of retiming. Furthermore, the elements of matrixes D and W are computed in a demand-driven way, which can reduce the capacity of memory. It is shown through the experimental results on ISCAS89 benchmarks that our algorithm is very effective for large-scale sequential circuits.