Theory of linear and integer programming
Theory of linear and integer programming
Introduction to algorithms
IEEE Transactions on Computers
TIM: a timing package for two-phase, level-clocked circuitry
DAC '93 Proceedings of the 30th international Design Automation Conference
Efficient implementation of retiming
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Retiming with non-zero clock skew, variable register, and interconnect delay
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
A timing analysis and optimization system for level-clocked circuitry
A timing analysis and optimization system for level-clocked circuitry
Understanding retiming through maximum average-delay cycles
Proceedings of the 3rd ACM symposium on Parallel algorithms and architectures
Exploiting hardware sharing in high-level synthesis for partial scan optimization
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
The practical application of retiming to the design of high-performance systems
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Retiming of Circuits with Single Phase Transparent Latches
ICCD '91 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Efficient retiming under a general delay model
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
Optimizing systems for effective block-processing: the k-delay problem
DAC '96 Proceedings of the 33rd annual Design Automation Conference
An improved algorithm for minimum-area retiming
DAC '97 Proceedings of the 34th annual Design Automation Conference
Performance driven resynthesis by exploiting retiming-induced state register equivalence
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Minimizing sensitivity to delay variations in high-performance synchronous circuits
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Maximizing performance by retiming and clock skew scheduling
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Retiming-based factorization for sequential logic optimization
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Optimizing computations for effective block-processing
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Properties and Algorithms for Unfolding of Probabilistic Data-Flow Graphs
Journal of VLSI Signal Processing Systems
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
Optimization of synchronous circuits
Logic Synthesis and Verification
Placement driven retiming with a coupled edge timing model
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Variables bounding based retiming algorithm
Journal of Computer Science and Technology
Wire Retiming for System-on-Chip by Fixpoint Computation
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Retiming with Interconnect and Gate Delay
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Performance-Directed Retiming for FPGAs Using Post-Placement Delay Information
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Optimal wire retiming without binary search
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
A practical cut-based physical retiming algorithm for field programmable gate arrays
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
An efficient retiming algorithm under setup and hold constraints
Proceedings of the 43rd annual Design Automation Conference
Integration, the VLSI Journal
Proceedings of the Conference on Design, Automation and Test in Europe
Wire retiming as fixpoint computation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient retiming of large circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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