Introduction to algorithms
Efficient implementation of retiming
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
DELAY: an efficient tool for retiming with realistic delay modeling
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Multilevel hypergraph partitioning: application in VLSI domain
DAC '97 Proceedings of the 34th annual Design Automation Conference
Simultaneous routing and buffer insertion with restrictions on buffer locations
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
POPL '77 Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Optimal buffered routing path constructions for single and multiple clock domain systems
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Concurrent flip-flop and repeater insertion for high performance integrated circuits
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Retiming for Wire Pipelining in System-On-Chip
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Incorporating interconnect, register, and clock distribution delays into the retiming process
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimal wire retiming without binary search
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Clustering for processing rate optimization
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
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In the current and future System-On-Chips, a non-negligible part of operation time is spent on multiple-clock period wires. Retiming -- that is moving flip-flops in a circuit without changing its functionality -- can be explored to pipeline long interconnect wires in SOC designs. The problem of retiming over a netlist of macro-blocks, where the internal structures may not be changed and flip-flops may not be inserted on some wire segments is called the wire retiming problem. In this paper, we formulate the constraints of the wire retiming problem as a fixpoint computation and use an iterative algorithm to solve it. Experimental results show that this approach is multiple orders more efficient than the previous one.