A variable observation time method for testing delay faults
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
A method of delay fault test generation
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
A Partial Enhanced-Scan Approach to Robust Delay-Fault Test Generation for Sequential Circuits
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Delay Testing Quality in Timing-Optimized Designs
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Delay Test: The Next Frontier for LSSD Test Systems
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
DELTEST: Deterministic Test Generation for Gate-Delay Faults
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
Quality Determination for Gate Delay Fault Tests Considering Three-State Elements
Journal of Electronic Testing: Theory and Applications - Special issue on the IEEE European Test Workshop
DFSIM: A Gate-Delay Fault Simulator for Sequential Circuits
EDTC '96 Proceedings of the 1996 European conference on Design and Test
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This article presents a technique for the extension of delay fault test pattern generation to synchronous sequential circuits without making use of scan techniques. The technique relies on the coupling of TDgen, a robust combinational test pattern generator for delay faults, and SEMILET, a sequential test pattern generator for several static fault models. The approach uses a forward propagation-backward justification technique: The test pattern generation is started at the fault location, and after successful "local" test generation fault effect propagation is performed and finally a synchronising sequence to the required state is computed. The algorithm is complete for a robust gate delay fault model, which means that for every testable fault a test will be generated, assuming sufficient time. Experimental results for the ISCAS'89 benchmarks are presented in this paper.