Actors: a model of concurrent computation in distributed systems
Actors: a model of concurrent computation in distributed systems
CRIS: a test cultivation program for sequential VLSI circuits
ICCAD '92 1992 IEEE/ACM international conference proceedings on Computer-aided design
Parallel algorithms for VLSI computer-aided design
Parallel algorithms for VLSI computer-aided design
Sequential circuit test generation in a genetic algorithm framework
DAC '94 Proceedings of the 31st annual Design Automation Conference
ProperHITEC: a portable, parallel, object-oriented approach to sequential test generation
DAC '94 Proceedings of the 31st annual Design Automation Conference
Genetic Algorithms in Search, Optimization and Machine Learning
Genetic Algorithms in Search, Optimization and Machine Learning
Proceedings of the 1994 ACM/IEEE conference on Supercomputing
Genetics-Based Learning of New Heuristics: Rational Scheduling of Experiments and Generalization
IEEE Transactions on Knowledge and Data Engineering
An Automatic Test Pattern Generator for Large Sequential Circuits Based on Genetic Algorithms
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
A genetic approach to test application time reduction for full scan and partial scan circuits
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
LOCSTEP: A Logic Simulation-Based Test Generation Procedure
FTCS '95 Proceedings of the Twenty-Fifth International Symposium on Fault-Tolerant Computing
A portable ATPG tool for parallel and distributed systems
VTS '95 Proceedings of the 13th IEEE VLSI Test Symposium
HITEC: a test generation package for sequential circuits
EURO-DAC '91 Proceedings of the conference on European design automation
| Hi-index | 0.00 |
The problem of test generation belongs to the class of NP-complete problems and it is becoming more and more difficult as the complexity of VLSI circuits increases, and as long as execution times pose an additional problem. Parallel implementations can potentially provide significant speedups while retaining good quality results. In this paper, we present three parallel genetic algorithms for simulation-based sequential circuit test generation. Simulation-based test generators are more capable of handling the constraints of complex design features than deterministic test generators. The three parallel genetic algorithm implementations are portable and scalable over a wide range of distributed and shared memory MIMD machines. Significant speedups were obtained, and fault coverages were similar to and occasionally better than those obtained using a sequential genetic algorithm, due to the parallel search strategies adopted.