A high-level synthesis approach to optimum design of self-checking circuits
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Automatic Synthesis of Self-Recovering VLSI Systems
IEEE Transactions on Computers
Efficient algorithms for analyzing and synthesizing fault-tolerant datapaths
DFT '95 Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
Optimizing High-Level Synthesis for Self-Checking Arithmetic Circuits
DFT '96 Proceedings of the 1996 Workshop on Defect and Fault-Tolerance in VLSI Systems
A low-redundancy approach to semi-concurrent error detection in data paths
Proceedings of the conference on Design, automation and test in Europe
Semiconcurrent Error Detection in Data Paths
IEEE Transactions on Computers
Co-Testing: Granting Testability in a Codesign Environment
Integrated Computer-Aided Engineering
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Fault-tolerance in embedded systems is a requirement of increasing importance; solutions must achieve a balance between performances and costs that was not usually requested in design of more classical fault-tolerant applications and that involves as a consequence new approaches. A design technique is here proposed supporting fault-tolerance of hardware modules in complex hardware-software systems, fault-tolerance requirements for each hardware-mapped process are specified in terms of time constraints and of relative priorities, and a high-level synthesis methodology allowing to design - for each process - a processor capable of supporting both the nominal execution of the process itself in a fault-free environment and simultaneous execution of a reconfigured pair of processes in a fault-affected environment is defined Performances of the scheduling algorithm, allowing to achieve reconfiguration with minimum resource increase and within the required limits of speed degradation, are evaluated on some relevant instances of algorithms discussed in current literature on high-level synthesis.