Boundary-scan design principles for efficient LSSD ASIC testing
IBM Journal of Research and Development
Design for testability and diagnosis in a VLSI CMOS System/370 processor
IBM Journal of Research and Development
Test methodologies and design automation for IBM ASICs
IBM Journal of Research and Development
The Test Access Port and Boundary-Scan Architecture
The Test Access Port and Boundary-Scan Architecture
Three Different MCMs, Three Different Test Strategies
Proceedings of the IEEE International Test Conference on Test and Design Validity
Testing the 400-MHz IBM Generation-4 CMOS Chip
Proceedings of the IEEE International Test Conference
A logic design structure for LSI testability
DAC '77 Proceedings of the 14th Design Automation Conference
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This paper describes the test generation strategies,novel test generation techniques and the tester strategyfor testing the IBM System/390驴 Generation-3 EnterpriseSystem Multi-Processor Module. The paper provides areview of the key test methodologies and a review ofactual test results as seen at the product tester.