On the effective bandwidth of interleaved memories in vector processor systems
IEEE Transactions on Computers
An Efficient Memory System for Image Processing
IEEE Transactions on Computers
VLSI array processors
On Linear Skewing Schemes and d-Ordered Vectors
IEEE Transactions on Computers
Vector access performance in parallel memories using skewed storage scheme
IEEE Transactions on Computers
Scrambled storage for parallel memory systems
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
Computer Architecture and Parallel Processing
Computer Architecture and Parallel Processing
Pseudo-randomly interleaved memory
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Architecture of an Array Processor Using a Nonlinear Skewing Scheme
IEEE Transactions on Computers
On storage schemes for parallel array access
ICS '92 Proceedings of the 6th international conference on Supercomputing
The Chinese remainder theorem and the prime memory system
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Semi-linear and bi-base storage schemes classes: general overview and case study
ICS '95 Proceedings of the 9th international conference on Supercomputing
Nonprime Memory Systems and Error Correction in Address Translation
IEEE Transactions on Computers
Conflict-free template access in k-ary and binomial trees
ICS '97 Proceedings of the 11th international conference on Supercomputing
Block, Multistride Vector, and FFT Accesses in Parallel Memory Systems
IEEE Transactions on Parallel and Distributed Systems
Latin Squares for Parallel Array Access
IEEE Transactions on Parallel and Distributed Systems
On the Effectiveness of Interleaved Memories for Binary Trees
PACT '93 Proceedings of the IFIP WG10.3. Working Conference on Architectures and Compilation Techniques for Fine and Medium Grain Parallelism
Multiaccess Memory System for Attached SIMD Computer
IEEE Transactions on Computers
On Design of Parallel Memory Access Schemes for Video Coding
Journal of VLSI Signal Processing Systems
PSIM: Periodically Shifted Interleaved Memory System
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 01
Searching for doubly self-orthogonal latin squares
CP'11 Proceedings of the 17th international conference on Principles and practice of constraint programming
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A new nonlinear skewing scheme is proposed for parallel array access. We introduce a new Latin square(perfect Latin square) which has several properties useful for parallel array access. A sufficient condition for the existence of perfect Latin squares and a simple construction method for perfect Latin squares are presented. The resulting skewing scheme provides conflict free access to various subsets of an N x N array using N memory modules. When the number of memory modules is an even power of two, address generation is performed in constant time using a simple circuit. This scheme is the first memory scheme that achieves constant time access to rows, columns, diagonals, and N1/2 x N1/2 subarrays of an N x N array using the minimum number of memory modules.