Speculative multithreaded processors
ICS '98 Proceedings of the 12th international conference on Supercomputing
ICS '98 Proceedings of the 12th international conference on Supercomputing
Coarse-grained speculative execution in shared-memory multiprocessors
ICS '98 Proceedings of the 12th international conference on Supercomputing
Speculative execution model with duplication
ICS '98 Proceedings of the 12th international conference on Supercomputing
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MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
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ICS '99 Proceedings of the 13th international conference on Supercomputing
Clustered speculative multithreaded processors
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Compiler Techniques for the Superthreaded Architectures
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A Chip-Multiprocessor Architecture with Speculative Multithreading
IEEE Transactions on Computers
The Superthreaded Processor Architecture
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Control independence in trace processors
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Value prediction for speculative multithreaded architectures
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IEEE Transactions on Computers
Slipstream processors: improving both performance and fault tolerance
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
IEEE Transactions on Parallel and Distributed Systems
A general compiler framework for speculative multithreading
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A survey of processors with explicit multithreading
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Exploiting Data Value Prediction in Compiler Based Thread Formation
HiPC '02 Proceedings of the 9th International Conference on High Performance Computing
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IPDPS '00 Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed Processing
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LCPC '99 Proceedings of the 12th International Workshop on Languages and Compilers for Parallel Computing
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ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
A Comprehensive Dynamic Processor Allocation Scheme for Multiprogrammed Multiprocessor Systems
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
A Clustered Approach to Multithreaded Processors
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
A trace-level value predictor for Contrail processors
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Thread Partitioning and Value Prediction for Exploiting Speculative Thread-Level Parallelism
IEEE Transactions on Computers
Min-cut program decomposition for thread-level speculation
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A General Compiler Framework for Speculative Multithreaded Processors
IEEE Transactions on Parallel and Distributed Systems
On-Chip Interconnects and Instruction Steering Schemes for Clustered Microarchitectures
IEEE Transactions on Parallel and Distributed Systems
The Impact of Incorrectly Speculated Memory Operations in a Multithreaded Architecture
IEEE Transactions on Parallel and Distributed Systems
Reducing misspeculation overhead for module-level speculative execution
Proceedings of the 2nd conference on Computing frontiers
Mitosis compiler: an infrastructure for speculative threading based on pre-computation slices
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Speculative thread decomposition through empirical optimization
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CC '09 Proceedings of the 18th International Conference on Compiler Construction: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009
Mostly static program partitioning of binary executables
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PCI'05 Proceedings of the 10th Panhellenic conference on Advances in Informatics
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Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
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This paper presents a new concurrent multiple-threaded architectural model, called superthreading, for exploiting thread-level parallelism on a processor. This architectural model adopts a thread pipelining execution model that allows threads with data dependences and control dependences to be executed in parallel. The basic idea of thread pipelining is to compute and forward recurrence data and possible dependent store addresses to the next thread as soon as possible, so the next thread can start execution and perform run-time data dependence checking. Thread pipelining also forces contiguous threads to perform their memory write-backs in order, which enables the compiler to fork threads with control speculation. With run-time support for data dependence checking and control speculation, the superthreaded architectural model can exploit loop-level parallelism from a broad range of applications.