Diagnosing programmable interconnect systems for FPGAs
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
Structural diagnosis of interconnects by coloring
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An Approach for Detecting Multiple Faulty FPGA Logic Blocks
IEEE Transactions on Computers
Adaptive Fault Detection and Diagnosis of RAM Interconnects
Journal of Electronic Testing: Theory and Applications
Built-in self-test of FPGA interconnect
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Test of RAM-based FPGA: methodology and application to the interconnect
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
On the Fault Coverage of Interconnect Diagnosis
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Maximal Diagnosis of Interconnects of Random Access Memories _
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
NOVEL TECHNIQUE FOR BUILT-IN SELF-TEST OF FPGA INTERCONNECTS
ITC '00 Proceedings of the 2000 IEEE International Test Conference
A novel FPGA local interconnect test scheme and automatic TC derivation/generation
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Desing and test of systems on a chip
Fine grain faults diagnosis of FPGA interconnect
Microprocessors & Microsystems
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Abstract: This paper presents a generalized new approach for testing interconnects (for boundary scan architectures) as well as field programmable interconnect chips (FPICs). The proposed structural test method explicitly avoids aliasing and confounding and as applicable to dense as well as sparse layouts. The proposed method is applicable to both one-step and two-step test generation and diagnosis. Two algorithms with an execution complexity of O(n/sup 2/), where n is the number of nets in the interconnect, are given. Simulation results for benchmark and randomly generated layouts show a substantial reduction in the number of tests using the proposed approaches compared with previous approaches. The applicability of the proposed approach to FPICs is discussed and evaluated by simulation.