Cache performance of operating system and multiprogramming workloads
ACM Transactions on Computer Systems (TOCS)
Computer Networks and ISDN Systems
An assessment of state and lookup overhead in routers
IEEE INFOCOM '92 Proceedings of the eleventh annual joint conference of the IEEE computer and communications societies on One world through communications (Vol. 3)
A case for two-way skewed-associative caches
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Column-associative caches: a technique for reducing the miss rate of direct-mapped caches
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Small forwarding tables for fast routing lookups
SIGCOMM '97 Proceedings of the ACM SIGCOMM '97 conference on Applications, technologies, architectures, and protocols for computer communication
IEEE/ACM Transactions on Networking (TON)
Fast address lookups using controlled prefix expansion
ACM Transactions on Computer Systems (TOCS)
IP lookups using multiway and multicolumn search
IEEE/ACM Transactions on Networking (TON)
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Cache Memory Design for Internet Processors
IEEE Micro
Fast Updating Algorithms for TCAMs
IEEE Micro
Routing Table Compaction in Ternary CAM
IEEE Micro
Understanding BGP misconfiguration
Proceedings of the 2002 conference on Applications, technologies, architectures, and protocols for computer communications
Fast incremental updates for pipelined forwarding engines
IEEE/ACM Transactions on Networking (TON)
IP-address lookup using LC-tries
IEEE Journal on Selected Areas in Communications
Low power network processor design using clock gating
Proceedings of the 42nd annual Design Automation Conference
Conserving network processor power consumption by exploiting traffic variability
ACM Transactions on Architecture and Code Optimization (TACO)
CHAP: Enabling Efficient Hardware-Based Multiple Hash Schemes for IP Lookup
NETWORKING '09 Proceedings of the 8th International IFIP-TC 6 Networking Conference
LOP: a novel SRAM-based architecture for low power and high throughput packet classification
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Progressive hashing for packet processing using set associative memory
Proceedings of the 5th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
Advanced hashing schemes for packet forwarding using set associative memory architectures
Journal of Parallel and Distributed Computing
Expediating IP lookups with reduced power via TBM and SST supernode caching
Computer Communications
A comprehensive performance analysis of virtual routers on FPGA
ACM Transactions on Reconfigurable Technology and Systems (TRETS) - Special Section on 19th Reconfigurable Architectures Workshop (RAW 2012)
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High-speed routers often use commodity, fully-associative,TCAMs (Ternary Content AddressableMemories) to perform packet classification and routing(IP-lookup). We propose a memory architecture calledIPStash to actasa TCAMreplacement,offering atthesame time, better functionality, higher performance,and significant power savings. The premise of our workis that full associativity is not necessary for IP-lookup.Rather, we show that the required associativity is simplya function of the routing table size. We propose a memoryarchitecture similar to set-associative caches butenhanced with mechanisms to facilitate IP-lookup andin particular longest prefix match. To perform longestprefix match efficiently in a set-associative array werestrict routing table prefixes to a small number oflengths using a controlled prefix expansion technique.Since this inflates the routing tables, we use skewedassociativity to increase the effective capacity of ourdevices. Compared to previous proposals, IPStash doesnot require any complicated routing table transformationsbut more importantly, it makes incrementalupdates to the routing tables effortless. The proposedarchitecture is also easily expandable. Our simulationsshow that IPStash is both fast and power efficient comparedto TCAMs. Specifically, IPStash devices -builtin the same technology as TCAMs- can run at speedsin excess of 600 MHz, offer more than twice the searchthroughput (200Msps), and consume up to 35% lesspower (for the same throughput) than the best commerciallyavailable TCAMs when tested with real routingtables and IP traffic.