VTCMOS characteristics and its optimum conditions predicted by a compact analytical model

Authors:
Hyunsik Im;Takashi Inukai;Hiroyuki Gomyo;Toshiro Hiramoto;Takayasu Sakurai
Affiliations:
Dongguk University, Seoul 100-715, Korea and Institute of Industrial Science (IIS), The University of Tokyo, Tokyo, Japan;Toshiba Corporation, Kawasaki 210-8520, Japan and Institute of Industrial Science (IIS), University of Tokyo, Tokyo, Japan;Matsushita Electric Industrial Corporation, Kawasaki, 211-8668, Japan;Institute of Industrial Sciences (IIS), The University of Tokyo, Tokyo, 153-8505, Japan;Institute of Industrial Sciences (IIS), The University of Tokyo, Tokyo, 153-8505, Japan
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
Year:
2003

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Abstract

A compact analytical model of variable-threshold-voltage CMOS (VTCMOS) is proposed to study the active on current, linking it with the standby off-current characteristics. Comparisons of modeled results to both numerical simulations and experimental data are made with an excellent agreement. It is clearly demonstrated using the model that speed degradation due to low supply voltage can be compensated by the VTCMOS scheme, even with smaller power. Influence of the short channel effect (SCE) on the performance of VTCMOS is investigated in terms of a new parameter, dS/dγ, both qualitatively and quantitatively. It is found that the SCE degrades the VTCMOS performance. Issues on the optimum conditions of VTCMOS and the performance of series-connected VTCMOS circuits are also discussed.